DocumentCode :
1359158
Title :
A 20 GS/s 5-Bit SiGe BiCMOS Dual-Nyquist Flash ADC With Sampling Capability up to 35 GS/s Featuring Offset Corrected Exclusive-Or Comparators
Author :
Kertis, Robert A. ; Humble, Jim S. ; Daun-Lindberg, Mary A. ; Philpott, Rick A. ; Fritz, Karl E. ; Schwab, Daniel J. ; Prairie, Jason F. ; Gilbert, Barry K. ; Daniel, Erik S.
Author_Institution :
Dept. of Physiol. & Biomed. Eng., Mayo Clinic, Rochester, MN, USA
Volume :
44
Issue :
9
fYear :
2009
Firstpage :
2295
Lastpage :
2311
Abstract :
The design and wafer probe test results of a 5-bit SiGe flash ADC are presented. The integrated circuit, fabricated in a 200/250 GHz fT/Fmax, SiGe BiCMOS technology, provides a 5-bit analog to digital conversion with dual Nyquist operation at sample frequencies up to 20 GHz. Sampling clock rates are demonstrated as high as 35 GS/s. The ADC makes use of a comparator with an integrated exclusive-or function to reduce power consumption. The device also generates two half-rate interleaved outputs to ease data capture with laboratory equipment. An effective number of bits (ENOB) of nearly 5.0 is achieved for low-frequency input tones, dropping to 4.0 at 10 GHz.
Keywords :
BiCMOS digital integrated circuits; analogue-digital conversion; comparators (circuits); germanium compounds; silicon compounds; SiGe BiCMOS dual-Nyquist flash ADC; analog-to-digital conversion; half-rate interleaved outputs; integrated circuit; offset corrected exclusive-or comparators; sampling capability; Analog integrated circuits; Analog-digital conversion; BiCMOS integrated circuits; Circuit testing; Digital integrated circuits; Germanium silicon alloys; Integrated circuit technology; Probes; Sampling methods; Silicon germanium; Analog-to-digital converter (ADC); BVceo; BVcer; Flash; Gray code; SiGe; differential nonlinearity (DNL); digital signal processor (DSP); effective number of bits (ENOB); effective resolution bandwidth (ERBW); exclusive-or; fast Fourier transform (FFT); integral nonlinearity (INL); least significant bit (LSB); spurious-free dynamic range (SFDR);
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2009.2022672
Filename :
5226705
Link To Document :
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