Title :
Characterization of Parasitic Bipolar Transistors in 45 nm Silicon-on-Insulator Technology
Author :
Wissel, Larry ; Oldiges, Phil ; Guo, Dechao
Author_Institution :
IBM Syst. & Technol. Group, Essex Junction, VT, USA
Abstract :
This paper describes the importance of bipolar current gain and diode ideality factor to predictions of single-event circuit responses. It then reports on measurements of parasitic bipolar transistors in 45 nm Silicon-on-Insulator (SOI) technology, and adjustments to the simulation model to match the measurements.
Keywords :
bipolar transistors; semiconductor device models; silicon-on-insulator; bipolar current gain; diode ideality factor; parasitic bipolar transistors; silicon-on-insulator technology; simulation model; single-event circuit responses; Bipolar transistors; Electrical resistance measurement; Silicon on insulator technology; Simulation; Single event upset; Parasitic bipolar; silicon-on-insulator (SOI) technology; single-event effect;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2010.2076833
