DocumentCode
1359717
Title
Edge Effects in Self-Heating-Related Instabilities in p-Channel Polycrystalline-Silicon Thin-Film Transistors
Author
Mariucci, L. ; Gaucci, P. ; Valletta, A. ; Pecora, A. ; Maiolo, L. ; Cuscunà, M. ; Fortunato, G.
Author_Institution
Ist. per la Microelettronica e Microsistemi, Consiglio Naz. delle Ric., Rome, Italy
Volume
32
Issue
12
fYear
2011
Firstpage
1707
Lastpage
1709
Abstract
Self-heating-related instabilities have been investigated in p-channel polycrystalline-silicon thin-fllm transistor, showing an anomalous transconductance (gm) increase. The gm increase is a fingerprint of edge effects, resulting from a buildup of positive trapped charge in the gate oxide at the channel edges. This was confirmed by the annihilation of such positive charges obtained by sequential hot-carrier bias-stress experiments. From the analysis of the edge effects in devices with different channel lengths, we were able, using 2-D numerical simulations, to deter mine the size of the defected edge regions to be 400 nm.
Keywords
elemental semiconductors; hot carriers; numerical analysis; silicon; thin film transistors; 2D numerical simulation; Si; anomalous transconductance; defected edge region; edge effect fingerprint; p-channel polycrystalline-silicon thin-film transistor; positive trapped charge; self-heating-related instability; sequential hot-carrier bias-stress experiment; size 400 nm; Degradation; Interface states; Logic gates; Performance evaluation; Silicon; Hot-carrier (HC) effects; polycrystalline silicon (polysilicon); self-heating (SH); thin-film transistor (TFT);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2011.2169040
Filename
6059476
Link To Document