Title :
Truncated Binary Multipliers With Variable Correction and Minimum Mean Square Error
Author :
Petra, Nicola ; Caro, Davide De ; Garofalo, Valeria ; Napoli, Ettore ; Strollo, Antonio G M
Author_Institution :
Dept. of Electron. & Telecommun. Eng., Univ. of Napoli Federico II, Naples, Italy
fDate :
6/1/2010 12:00:00 AM
Abstract :
Truncated multipliers compute the n most-significant bits of the n × n bits product. This paper focuses on variable-correction truncated multipliers, where some partial-products are discarded, to reduce complexity, and a suitable compensation function is added to partly compensate the introduced error. The optimal compensation function, that minimizes the mean square error, is obtained in this paper in closed-form for the first time. A sub optimal compensation function, best suited for hardware implementation, is introduced. Efficient multipliers implementation based on sub-optimal function is discussed. Proposed truncated multipliers are extensively compared with previously proposed circuits. Experimental results, for a 0.18 μm technology, are also presented.
Keywords :
error compensation; least mean squares methods; multiplying circuits; error compensation function; minimum mean square error; size 0.18 mum; truncated binary multipliers; variable-correction truncated multipliers; Multiplication; digital arithmetic; error analysis; error compensation; least mean square method; truncated multipliers;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2009.2033536