• DocumentCode
    1360715
  • Title

    From behavior to structure: high-level synthesis

  • Author

    Camposano, R.

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • Volume
    7
  • Issue
    5
  • fYear
    1990
  • Firstpage
    8
  • Lastpage
    19
  • Abstract
    This paper shows how high-level synthesis bridges the gap between behavioral specifications and hardware structure by automatically generating a circuit description from a netlist. The resulting description can be used for other design automation tools, such as logic synthesis and layout. As opposed to logic synthesis, which optimizes only combinational logic, high-level synthesis deals with memory elements, the interconnection structures, (such as buses and multiplexers), and the sequential aspects of a design. The steps in the process of synthesizing synchronous digital hardware are explained. They consist of compilation, high-level transformations, scheduling, and allocation. Design representation is discussed, and problems remaining to be solved are indicated.<>
  • Keywords
    circuit layout CAD; logic CAD; logic testing; allocation; behavioral specifications; circuit description; compilation; design automation tools; hardware structure; high-level synthesis; high-level transformations; interconnection structures; layout; logic synthesis; memory elements; netlist; scheduling; Bridge circuits; Circuit synthesis; Design automation; Hardware; High level synthesis; Integrated circuit interconnections; LAN interconnection; Logic design; Logic testing; Multiplexing;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.60603
  • Filename
    60603