Title :
Analogue delay-locked loop for spatial-phase locking
Author :
Goodberlet, J. ; Ferrera, J. ; Smith, H.T.
Author_Institution :
Res. Lab. of Electron., MIT, Cambridge, MA, USA
fDate :
7/17/1997 12:00:00 AM
Abstract :
An analogue delay-locked loop has been developed for spatial-phase locking in a scanning electron-beam lithography system. The loop improves pattern-placement precision to 3σ≃12 nm, by referencing all writing to a 400 nm-period grating. Results compare well with a numerical simulation
Keywords :
analogue circuits; delay circuits; electron beam lithography; analogue delay-locked loop; pattern-placement precision; scanning electron-beam lithography system; spatial-phase locking;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19970858
