• DocumentCode
    1360809
  • Title

    Analogue delay-locked loop for spatial-phase locking

  • Author

    Goodberlet, J. ; Ferrera, J. ; Smith, H.T.

  • Author_Institution
    Res. Lab. of Electron., MIT, Cambridge, MA, USA
  • Volume
    33
  • Issue
    15
  • fYear
    1997
  • fDate
    7/17/1997 12:00:00 AM
  • Firstpage
    1269
  • Lastpage
    1270
  • Abstract
    An analogue delay-locked loop has been developed for spatial-phase locking in a scanning electron-beam lithography system. The loop improves pattern-placement precision to 3σ≃12 nm, by referencing all writing to a 400 nm-period grating. Results compare well with a numerical simulation
  • Keywords
    analogue circuits; delay circuits; electron beam lithography; analogue delay-locked loop; pattern-placement precision; scanning electron-beam lithography system; spatial-phase locking;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19970858
  • Filename
    606043
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1360809