DocumentCode :
1360896
Title :
Design Space Exploration Acceleration Through Operation Clustering
Author :
Schafer, Benjamin Carrion ; Wakabayashi, Kazutoshi
Volume :
29
Issue :
1
fYear :
2010
Firstpage :
153
Lastpage :
157
Abstract :
This paper presents a clustering method called clustering design space exploration (CDS-ExpA) to accelerate the architectural exploration of behavioral descriptions in C and SystemC. The trade-offs between faster exploration versus optimality of results are investigated. Two variations of CDS-ExpA were developed: CDS-ExpA(min) and CDS-ExpA(max). CDS-ExpA(min) builds the smallest possible clusters while CDS-ExpA(max) builds the largest possible ones, reducing further the design space. Results show that CDS-ExpA(min) and CDS-ExpA(max) explore the design space 90% and 92% faster on average than a previously developed annealer-based exploration, method, at the expense of not finding 36% and 47% of the Pareto optimal designs and finding the smallest design that is 7% and 9% on average, larger, and the fastest design 28% and 32% slower, respectively.
Keywords :
Acceleration; Annealing; Clustering methods; Design methodology; Hardware; High level synthesis; Laboratories; National electric code; Runtime; Space exploration; Acceleration; clustering; design space exploration; high-level synthesis;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2009.2035579
Filename :
5356292
Link To Document :
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