• DocumentCode
    1363071
  • Title

    Easily testable iterative logic arrays

  • Author

    Wu, Cheng-Wen ; Cappello, Peter R.

  • Author_Institution
    Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • Volume
    39
  • Issue
    5
  • fYear
    1990
  • fDate
    5/1/1990 12:00:00 AM
  • Firstpage
    640
  • Lastpage
    652
  • Abstract
    Iterative logic arrays (ILAs) are studied with respect to two testing problems. First, a variety of conditions is presented. Meeting these conditions guarantees an upper bound on the size of the test set for the ILA under consideration. Second, techniques for designing optimally testable ILAs are presented. The arrays treated are, in some cases, more general than those that have been reported by other researchers: they include multidimensional and inhomogeneous arrays. Octagonally connected arrays and bilateral arrays are also discussed. The results indicate that the characteristics of the individual cell functions (e.g. whether they are bijective) are a good guide to the test complexity of the overall array. Matrix multiplication, as an example, is shown to have several different optimally testable implementations. The results are useful for combinational and pipelined arrays and for certain systolic arrays
  • Keywords
    cellular arrays; combinatorial circuits; logic testing; bilateral arrays; combinational arrays; easily testable iterative logic arrays; inhomogeneous arrays; matrix multiplication; multidimensional arrays; octagonally connected arrays; pipelined arrays; systolic arrays; test complexity; upper bound; Circuit faults; Circuit testing; Costs; Hardware; Integrated circuit technology; Logic arrays; Logic testing; Multidimensional systems; Systolic arrays; Upper bound;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.53577
  • Filename
    53577