• DocumentCode
    1363233
  • Title

    Fast Bit-Parallel Shifted Polynomial Basis Multiplier Using Weakly Dual Basis Over GF(2^{m})

  • Author

    Park, Sun-Mi ; Chang, Ku-Young

  • Author_Institution
    Dept. of Math. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
  • Volume
    19
  • Issue
    12
  • fYear
    2011
  • Firstpage
    2317
  • Lastpage
    2321
  • Abstract
    In this paper, we present a new method to compute the Mastrovito matrix for GF(2m) generated by an arbitrary irreducible polynomial using weakly dual basis of shifted polynomial basis. In particular, we derive the explicit formulas of the proposed multiplier for special type of irreducible pentanomial xm+xk3+xk2+xk1+1 with k1 <; k2 ≤ (k1+k3)/2 <; k3 <; min(2k1,m/2). As a result, the time complexity of the proposed multiplier matches or outperforms the previously known results. On the other hand, the number of XOR gates of the proposed multiplier is slightly greater than the best known results.
  • Keywords
    Galois fields; computational complexity; logic gates; multiplying circuits; polynomial matrices; GF(2m); Mastrovito matrix; XOR gates; arbitrary irreducible polynomial; fast bit-parallel shifted polynomial basis multiplier; time complexity; weakly dual basis; Abstract algebra; Complexity theory; Cryptography; Delay; Delay effects; Polynomials; Bit-parallel multiplier; finite field arithmetic; pentanomial; shifted polynomial basis; weakly dual basis (WDB);
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2010.2075946
  • Filename
    5611642