Three-Dimensional nand Flash Architecture Design Based on Single-Crystalline STacked ARray

Author

Kim, Yoon ; Yun, Jang-Gn ; Park, Se Hwan ; Kim, Wandong ; Seo, Joo Yun ; Kang, Myounggon ; Ryoo, Kyung-Chang ; Oh, Jeong-Hoon ; Lee, Jong-Ho ; Shin, Hyungcheol ; Park, Byung-Gook

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea

Volume

59

Issue

1

fYear

2012

Firstpage

35

Lastpage

45

Abstract

Various critical issues related with 3-D stacked nand Flash memory are examined in this paper. Our single-crystalline STacked ARray (STAR) has many advantages such as better scalability, possibility of single-crystal channel, less sensitivity to 3-D interference, stable virtual source/drain characteristic, and more extendability over other stacked structures. With STAR, we proposed a unit 3-D structure, i.e., “building.” Then, using this new component, 3-D block and full chip architecture are successfully designed. For the first time, the structure and operation methods of the “full” array are considered. The fully designed 3-D nand Flash architecture will be the novel solution of reliable 3-D stacked nand Flash memory for terabit density.

Keywords

NAND circuits; design; flash memories; 3D interference; NAND flash architecture; design; flash memory; single-crystalline stacked array; stable virtual source/drain characteristic; Arrays; Couplings; Flash memory; Interference; Logic gates; Microprocessors; 3-D block; 3-D memory; 3-D stacked nand Flash memory; Channel–channel (Ch–Ch) coupling; single-crystalline STacked ARray (STAR);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2011.2170841

Filename

6062401