Linear Scaling of Reset Current Down to 22-nm Node for a Novel $\hbox {Cu}_{x}\hbox {Si}_{y}\hbox {O}$ RRAM

The relationship between low resistance (R_on) and cell size (from 40 nm to 100 μm) is systematically investigated using a 1-Mb CuxSiyO resistive RAM (RRAM) array. To our knowledge, this is the first study to attempt such an endeavor. Spacer pattern technology is employed to obtain a small cell size on the basis of a 0.13-μm standard logic process. R_on exhibits minimal change at 100 μm to 90 nm of RRAM size. However, it quadratically increases at 90 to 40 nm. The reset current, which is highly dependent on R_on, is linearly reduced fivefold in accordance with cell size, thereby improving overall power reduction and cell size scaling. The R_on dependence on cell size can be well explained by the dendritelike conductive filament model.