DocumentCode :
1364430
Title :
Advanced two IC chipset for DVB on satellite reception
Author :
Haas, M. ; Kuttner, F. ; Frieling, F. ; Hobbach, G. ; Kriedt, H. ; Mueller, K. ; Reventlow, C.v.
Author_Institution :
Siemens AG, Villach, Austria
Volume :
42
Issue :
3
fYear :
1996
fDate :
8/1/1996 12:00:00 AM
Firstpage :
341
Lastpage :
345
Abstract :
A QPSK chipset applicable for digital video broadcast (DVB) signals from a satellite is described. It consists of two ICs, a bipolar I/Q demodulator with an on-chip AGC and delayed tuner AGC and a CMOS QPSK processor device with an ADC, clock and carrier recovery, Viterbi decoding and Reed-Solomon forward error correction
Keywords :
CMOS digital integrated circuits; Reed-Solomon codes; Viterbi decoding; analogue-digital conversion; automatic gain control; bipolar digital integrated circuits; demodulation; demodulators; digital television; forward error correction; quadrature phase shift keying; satellite communication; television receivers; ADC; CMOS QPSK processor device; DVB; DVB signals; IC chipset; QPSK chipset; RS forward error correction; Reed-Solomon forward error correction; Viterbi decoding; bipolar I/Q demodulator; carrier recovery; clock recovery; digital satellite receiver; digital video broadcast signals; on-chip AGC; satellite reception; CMOS process; Clocks; Decoding; Delay; Demodulation; Digital video broadcasting; Quadrature phase shift keying; Satellite broadcasting; Tuners; Viterbi algorithm;
fLanguage :
English
Journal_Title :
Consumer Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-3063
Type :
jour
DOI :
10.1109/30.536129
Filename :
536129
Link To Document :
بازگشت