• DocumentCode
    1365053
  • Title

    A bus controlled clock generator IC [for TV front end]

  • Author

    Kramer, Ronalf

  • Author_Institution
    Siemens AG, Munich, Germany
  • Volume
    37
  • Issue
    3
  • fYear
    1991
  • fDate
    8/1/1991 12:00:00 AM
  • Firstpage
    531
  • Lastpage
    536
  • Abstract
    The author describes a line-locked clock generation circuit for digital video processing systems with a digital line-PLL (phase-locked loop) and a digital/analog clock-PLL. A virtual frequency twice that of a crystal is used
  • Keywords
    clocks; colour television receivers; digital signal processing chips; phase-locked loops; TV front end; bus controlled clock generator IC; digital line-PLL; digital video processing systems; digital/analog clock-PLL; Circuits; Clocks; Decoding; Frequency; Interference; Oscillators; Phase locked loops; Sampling methods; TV; Timing;
  • fLanguage
    English
  • Journal_Title
    Consumer Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-3063
  • Type

    jour

  • DOI
    10.1109/30.85563
  • Filename
    85563
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1365053