Circuit and Physical Design Implementation of the Microprocessor Chip for the zEnterprise System

Author

Warnock, James ; Chan, Yiu-Hing ; Carey, Sean ; Wen, Huajun ; Meaney, Pat ; Gerwig, Guenter ; Smith, Howard H. ; Chan, Yuen ; Davis, John ; Bunce, Paul ; Pelella, Antonio ; Rodko, Dan ; Patel, Pradip ; Strach, Thomas ; Malone, Doug ; Malgioglio, Frank ; N

Author_Institution

IBM Syst. & Technol. Group, Yorktown Heights, NY, USA

Volume

47

Issue

1

fYear

2012

Firstpage

151

Lastpage

163

Abstract

This paper describes the circuit and physical design features of the z196 processor chip, implemented in a 45 nm SOI technology. The chip contains 4 super-scalar, out-of-order processor cores, running at 5.2 GHz, on a die with an area of 512 mm² containing an estimated 1.4 billion transistors. The core and chip design methodology and specific design features are presented, focusing on techniques used to enable high-frequency operation. In addition, chip power, IR drop, and supply noise are discussed, being key design focus areas. The chip´s ground-breaking RAS features are also described, engineered for maximum reliability and system stability.

Keywords

integrated circuit design; integrated circuit noise; integrated circuit reliability; microprocessor chips; silicon-on-insulator; transistors; IR drop; SOI technology; chip design methodology; chip power; core design methodology; design features; frequency 5.2 GHz; ground-breaking RAS features; high-frequency operation; key design focus areas; maximum reliability; microprocessor chip; out-of-order processor cores; physical design implementation; size 45 nm; super-scalar processor cores; supply noise; system stability; transistors; z196 processor chip; zEnterprise system; Arrays; Clocks; Logic gates; Random access memory; Timing; Tuning; Wires; 45 nm SOI; CMOS digital integrated circuits; Cache set predict; RAIM; RAS; SRAM; VLSI design; chip IR drop; chip integration; chip supply noise; circuit design methodology; clock distribution; clock grid; design for reliability; design for test; digital circuits; high-frequency CMOS design; microprocessor test; microprocessors; power efficiency; reliability; system z; z196; zEnterprise; zEnterprise 196;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2011.2169308

Filename

6064913