Low-Capacitance Low-Voltage Triggered SCR ESD Clamp Using nMOS With Asymmetric Drain for RF ICs

Author

Park, Jae-Young ; Kim, Dae-Woo ; Son, Young-Sang ; Ha, Jong-Chan ; Song, Jong-Kyu ; Jang, Chang-Soo ; Jung, Won-Young

Author_Institution

Device Eng. Team, Dongbu Hitek Co., Ltd., Bucheon, South Korea

Volume

59

Issue

2

fYear

2011

Firstpage

360

Lastpage

367

Abstract

A novel low-capacitance low-voltage triggered silicon-controlled rectifier (LC-LVTSCR) electrostatic discharge (ESD) clamp is proposed in a 0.13-μm RF process. The proposed ESD clamp meets the ESD robustness and the RF requirement. The mechanism of the proposed LC-LVTSCR is investigated by T-CAD simulations, and a method to reduce the parasitic capacitance is presented. From the measurement, it was observed that the proposed ESD clamp has approximately 50% lower parasitic capacitance compared to the conventional LVTSCR device. The proposed ESD clamp was successfully used in a 2.4-GHz RF transceiver chip. The RF chip with the new proposed LC-LVTSCR passed a human body model 1-kV and machine model 100-V ESD test.

Keywords

UHF integrated circuits; electrostatic discharge; low-power electronics; radio transceivers; technology CAD (electronics); thyristors; ESD clamp; RF transceiver chip; T-CAD simulations; asymmetric drain; electrostatic discharge; frequency 2.4 GHz; human body model; machine model; nMOS; parasitic capacitance; radiofrequency integrated circuits; size 0.13 mum; triggered silicon-controlled rectifier; Electrostatic discharge (ESD); RF integrated circuit (ICs); human body model (HBM); low-voltage triggered silicon-controlled rectifier (LVTSCR); machine model (MM);

fLanguage

English

Journal_Title

Microwave Theory and Techniques, IEEE Transactions on

Publisher

ieee

ISSN

0018-9480

Type

jour

DOI

10.1109/TMTT.2010.2086067

Filename

5613964