DocumentCode
1365859
Title
The DIP may take its final bows: The dual-in-line package, the reigning IC package for several generations, is losing position to newcomers for packaging advanced chips
Author
Bowlby, R.
Author_Institution
Motorola Inc., Phoenix, AZ, USA
Volume
22
Issue
6
fYear
1985
fDate
6/1/1985 12:00:00 AM
Firstpage
37
Lastpage
42
Abstract
As the number of leads, or pins, on the dual-in-line package (DIP) increases, its size increases rapidly. DIPs are becoming up to 50 times bigger than the chips themselves, thus defeating the gains of miniaturization resulting from IC advances. A pin-grid array package with leads protruding from the bottom, can handle 256 leads in an area of about 3 square inches. New packages that are becoming available for integrated circuits are described, and the way in which these packages are attached to printed circuit boards is considered. Small-outline integrated circuits, plastic leaded chip carriers, ceramic leaded chip carriers, leadless ceramic chip carriers, and pin-grid arrays are covered. It is pointed out that if metal leads could be eliminated entirely, electrical signal delay and nonuniformity could be greatly reduced. A technique for doing this is tape-automated bonding in which chips may be applied directly to printed-circuit boards.
Keywords
VLSI; integrated circuit technology; large scale integration; packaging; COB; DIL; DIP; TAB; ceramic leaded chip carriers; chip on board; electrical signal delay; integrated circuit technology; leadless ceramic chip carriers; miniaturization; packaging; pin-grid array package; plastic leaded chip carriers; printed circuit boards; tape-automated bonding; Arrays; Ceramics; Electronics packaging; Lead; Plastics; Very large scale integration;
fLanguage
English
Journal_Title
Spectrum, IEEE
Publisher
ieee
ISSN
0018-9235
Type
jour
DOI
10.1109/MSPEC.1985.6370492
Filename
6370492
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