Title :
A 32×32-b adiabatic register file with supply clock generator
Author :
Moon, Yong ; Jeong, Deog-Kyoon
Author_Institution :
MTP Design Group, LG Semicon Co. Ltd., Seoul, South Korea
fDate :
5/1/1998 12:00:00 AM
Abstract :
A 32×32-b adiabatic register file with one read port and one write port is designed. A four-phase clock generator is also designed to provide supply clocks for adiabatic circuits. All the word line and bit line charge on the capacitive interconnections is recovered to save energy. Adiabatic circuits are based on efficient charge recovery logic (ECRL) and are integrated using 0.8 μm complimentary metal-oxide-semiconductor (CMOS) technology. Measurement results show that power consumption of the core is significantly reduced by a factor of up to 3.5 compared with a conventional circuit
Keywords :
CMOS logic circuits; clocks; 0.8 micron; 32 bit; CMOS technology; adiabatic register file; capacitive interconnection; core power consumption; efficient charge recovery logic; integrated circuit; supply clock generator; CMOS logic circuits; CMOS technology; Clocks; Energy consumption; Integrated circuit interconnections; Microprocessors; Moon; Power generation; Power system restoration; Registers;
Journal_Title :
Solid-State Circuits, IEEE Journal of
