Low-complexity receiver algorithms for the Grand-Alliance VSB HDTV system

We develop and simulate algorithms required for the front end of the baseband Grand-Alliance high-definition television (G-A HDTV) receiver. This includes noncoherent and coherent automatic gain controls, IF-FPLL polarity detection, segment synchronization and symbol timing recovery. Especially, we propose a simple polarity detection algorithm that resolves the bi-stability of the IF-FPLL unit used in the G-A, HDTV receiver and a segment synchronization algorithm that can be implemented with reduced complexity compared to that proposed by Sgrignoli, Bretl and Citta (see ibid., vol.41, no.3, p.367, 1995) and Bretl, Sgrignoli and Snopko (see ibid., vol.41, no.3, p.773, 1995). Computer simulation results show that the overall receiver design gives satisfactory performance under AWGN, multipath fading and timing drift. Finite bit precision simulations are also performed to determine the proper bit precisions required for each of the functional blocks for circuit implementation. The practical operation of the design is verified via HDL construction and simulation