Title :
New experimental evidence of latent interface-trap buildup in power VDMOSFETs
Author :
Jaksic, A.B. ; Ristic, G.S. ; Pejovic, M.M.
Author_Institution :
Fac. of Electron. Eng., Nis, Yugoslavia
fDate :
6/1/2000 12:00:00 AM
Abstract :
The paper presents new experimental evidence of the latent interface-trap buildup during annealing of gamma-ray irradiated power VDMOSFETs. We try to reveal the nature of this still ill-understood phenomenon by isothermal annealing, switching temperature annealing and switching bias annealing experiments. Possible explanations of obtained experimental results are discussed in the context of several models for post-irradiation behavior of radiation-induced defects
Keywords :
annealing; electron traps; gamma-ray effects; power MOSFET; semiconductor device measurement; semiconductor device models; annealing; gamma-ray irradiation; isothermal annealing; latent interface-trap buildup; post-irradiation behavior; power VDMOSFETs; radiation-induced defects; switching bias annealing; switching temperature annealing; Annealing; Context modeling; Isothermal processes; MOS devices; MOSFETs; Medium voltage; Nitrogen; Power engineering and energy; Temperature dependence; Temperature distribution;
Journal_Title :
Nuclear Science, IEEE Transactions on
