A CMOS baseline holder (BLH) for readout ASICs

Author

Geronimo, G. De ; O´Connor, Patrick ; Grosholz, J.

Author_Institution

Instrum. Div., Brookhaven Nat. Lab., Upton, NY, USA

Volume

47

Issue

3

fYear

2000

fDate

6/1/2000 12:00:00 AM

Firstpage

818

Lastpage

822

Abstract

As a result of a cooperation between Brookhaven National Laboratory and eV Products a generation of high performance readout ASICs was developed. One of the novel circuit solutions implemented in the ASICs is the baseline holder (BLH), a system which provides setting and stabilization of the output baseline both at low frequency and at high rate operation. The BLH is conceptually different from the baseline restorer (BLR). With a output peaking voltage 2 V (10 fC), a peaking time 400 ns and a rate 500 kHz, an asymptotic shift of the baseline <8 mV was measured in the periodic case. A resolution higher than 12 bit was found in the random arrival of pulses case

Keywords

CMOS analogue integrated circuits; application specific integrated circuits; nuclear electronics; readout electronics; 2 V; 400 ns; 500 kHz; CMOS baseline holder; output baseline; readout ASICs; resolution; stabilization; Application specific integrated circuits; CMOS technology; Detectors; Frequency; Instruments; Laboratories; Leak detection; Low pass filters; Signal processing; Time measurement;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.856523

Filename

856523