Title :
Multilevel-spiral inductors using VLSI interconnect technology
Author :
Burghartz, J.N. ; Jenkins, K.A. ; Soyuer, M.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
A multilevel-spiral (MLS) inductor structure for implementation in VLSI interconnect technology is presented. Inductances of 8.8 and 32 nH and maximum quality-factors (Q) of /spl sim/6.8 and 3.0, respectively, are achieved in a four-level metal BiCMOS technology, with four turns at each of the two or four stacked spiral coils and with an area of 226×226 μm2. The comparison of the MLS inductors to different single-level-spiral (SLS) control devices shows that a MLS inductor provides the same inductance at /spl sim/50% dc resistance, but the maximum Q is typically measured at a lower frequency and the self-resonance frequency is reduced due to a high inter-wire capacitance.
Keywords :
BiCMOS integrated circuits; Q-factor; VLSI; coils; inductance; inductors; integrated circuit interconnections; 226 micron; VLSI interconnect technology; four-level metal BiCMOS technology; inductance; inter-wire capacitance; multilevel-spiral inductors; quality-factors; self-resonance frequency; stacked spiral coils; BiCMOS integrated circuits; Capacitance measurement; Coils; Electrical resistance measurement; Frequency; Inductors; Laser sintering; Multilevel systems; Spirals; Very large scale integration;
Journal_Title :
Electron Device Letters, IEEE