Toward simpler, faster computers: By omitting unnecessary functions, designers of reduced-instruction-set computers increase system speed and hold down equipment costs

It is pointed out that examinations, some of them made as far back as the 1960s, of which instruction computers actually execute and how much time they spend executing them appear to indicate that complex, specialized instructions are so infrequent that they cost more to implement than they are worth. A computer designed according to RISC (reduced-instruction-set computer) precepts-which its proponents see as the fundamental direction for computer architectures for the next decade-would jettison such instructions, allowing designers to concentrate on making the core instruction set run faster. About half a dozen RISC computers have been built so far, some of them research machines and other commercial products, and all claim significantly better performance than equivalent conventional computers. Two slightly different approaches have been taken to building RISC computers: the register-window approach, which relies on a large number of registers to store variables that would otherwise have to be fetched from the slower main memory, and the single-register-set approach which pares hardware down to a minimum and relies on a smart compiler to allocate variables most efficiently to registers.