IGRAINE-an Implication GRaph-bAsed engINE for fast implication, justification, and propagation

Implication, justification, and propagation are three important Boolean problems that have to be solved during many tasks in electronic design automation (EDA) for digital circuits. As they constitute the key components of automatic test pattern generation (ATPG) most algorithms that tackle these problems originate in ATPG research. Due to their fundamental nature these ATPG-based methods have successfully been adopted by logic synthesis and formal verification where they have helped advance the fields of netlist optimization and Boolean equivalence checking. Despite their high importance and wide applicability, the data structures and algorithms suggested so far have proven to be suboptimal and inflexible in several respects. Therefore, we propose IGRAINE, a fast and flexible engine for performing implication, justification, and propagation in combinational circuits that is specifically optimized with respect to these tasks. Due to its modular design, IGRAINE is easily included into new applications that require ATPG-based methods. Our approach is based on a new implication graph (IG) model which forms the core of IGRAINE. Contrary to other IG models, the proposed IG represents all information on the implemented logic function as well as the topology of a combinational circuit in a single graph model. In order to demonstrate the performance of the presented IG-based algorithms for implication, justification, and propagation, we provide experimental results for stuck-at and path delay fault ATPG as well as Boolean equivalence checking. They show that TIP outperforms the state-of-the-art in SAT-based and structure-based ATPG. A comparison with tools for Boolean equivalence checking demonstrates the high effectiveness of our approach