Title :
The Gmicro/100 32-bit microprocessor
Author :
Yoshida, Toyohika ; Shimisu, T. ; Mizugaki, Shigeo ; Hinata, Junichi
Author_Institution :
Mitsubishi Electr. Corp., Hyogo, Japan
Abstract :
A description is given of the Gmicro/100, a 32-b VLSI microprocessor based on the TRON specification. The Gmicro/100 five-stage pipeline, prejump mechanism, and bitmap manipulation are examined. Performance results are reported. They show that the prejump mechanism, implemented as a hardware solution for the jump problem, executes benchmark programs 16.8% faster on the average. Optimized microinstructions permit bitmap-manipulation instructions to perform two to five times faster than the software loops. The application-specific standard product approach used to implement Gmicro/100 is discussed.<>
Keywords :
VLSI; application specific integrated circuits; microprocessor chips; 32 bit; 32-b VLSI microprocessor; Gmicro/100; TRON specification; application-specific standard product; benchmark programs; bitmap-manipulation instructions; five-stage pipeline; optimised microinstructions; prejump mechanism; software loops; Adders; CMOS process; Clocks; Counting circuits; Decoding; Microprocessors; Pipeline processing; Prefetching; Read only memory; Transfer functions;
Journal_Title :
Micro, IEEE
