The architecture of the Sure System 2000 communications processor

Author

Kabemoto, Akira ; Yoshida, Jiroshi

Author_Institution

Fujitsu Ltd., Kawasaki, Japan

Volume

11

Issue

4

fYear

1991

Firstpage

28

Lastpage

31

Abstract

Sure System 2000, a fault-tolerant computer that couples multiprocessors to offer low-priced, high-performance systems that deal effectively with faults and failures, is presented. The architecture is based on the local redundancy technique, ensuring that no hardware or software fault can cause a system crash. Software errors can be fixed, and hardware can be replaced, upgraded, or added dynamically. Existing fault-tolerant computers are briefly reviewed, and the logic hardware system configuration of the Sure System 2000 is described. The multiprocessor and I/O architecture are examined. The SXO Sure System 2000 expandable operating system is described.<>

Keywords

fault tolerant computing; parallel architectures; parallel machines; I/O architecture; SXO; Sure System 2000 communications processor; expandable operating system; fault-tolerant computer; local redundancy; logic hardware system; multiprocessors; Application software; Computer aided manufacturing; Computer architecture; Computer networks; Costs; Fault tolerant systems; Hardware; Operating systems; Redundancy; Switches;

fLanguage

English

Journal_Title

Micro, IEEE

Publisher

ieee

ISSN

0272-1732

Type

jour

DOI

10.1109/40.85724

Filename

85724