Title :
The cleaning at a back surface and edge of a wafer for introducing Cu metallization process
Author :
Itoh, Masaki ; Ishii, Yukino ; Jinbo, Tomoko ; Akimori, Hiroko ; Futase, Takuya ; Saeki, Tomonori
Author_Institution :
Device Dev. Center, Hitachi Ltd., Tokyo, Japan
fDate :
8/1/2000 12:00:00 AM
Abstract :
Cu metallization has been introduced in high-speed complementary metal-oxide-semiconductor (CMOS) large scale integration (LSI) in order to achieve low electrical resistivity. This means Cu contamination can be spread all over semiconductor equipment by the wafers, even though Cu has been thoroughly eliminated from semiconductor manufacturing for a long time. To protect the other wafers without Cu from Cu cross-contamination, we have demonstrated a method that can clean the back surface and selectively clean the edge of a wafer simultaneously without any masks. This method performs the cleaning by optimizing the overhang of chemicals in the single-wafer system with the Bernoulli chuck. We have also demonstrated a new edge extractor that can be used to perform the quantitative evaluation of Cu contamination at the wafer edge. The combination of the edge cleaning and the edge evaluation is useful for introducing not only Cu, but also new exotic materials such as Ta2O5 and BST
Keywords :
CMOS integrated circuits; copper; electrical resistivity; integrated circuit metallisation; large scale integration; surface cleaning; Bernoulli chuck; Cu; back surface; cleaning; cross-contamination; electrical resistivity; high-speed complementary metal-oxide-semiconductor; large scale integration; metallization process; overhang; single-wafer system; Chemicals; Electric resistance; Large scale integration; Metallization; Optimization methods; Performance evaluation; Protection; Semiconductor device manufacture; Surface cleaning; Surface contamination;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on