Title :
A neural-network approach to recognize defect spatial pattern in semiconductor fabrication
Author :
Chen, Fei-Long ; Liu, Shu-Fan
Author_Institution :
Dept. of Ind. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fDate :
8/1/2000 12:00:00 AM
Abstract :
Yield enhancement in semiconductor fabrication is important. Even though IC yield loss may be attributed to many problems, the existence of defects on the wafer is one of the main causes. When the defects on the wafer form spatial patterns, it is usually a clue for the identification of equipment problems or process variations. This research intends to develop an intelligent system, which will recognize defect spatial patterns to aid in the diagnosis of failure causes. The neural-network architecture named adaptive resonance theory network 1 (ART1) was adopted for this purpose. Actual data obtained from a semiconductor manufacturing company in Taiwan were used in experiments with the proposed system. Comparison between ART1 and another unsupervised neural network, self-organizing map (SOM), was also conducted. The results show that ART1 architecture can recognize the similar defect spatial patterns more easily and correctly
Keywords :
ART neural nets; crystal defects; integrated circuit yield; pattern recognition; production engineering computing; self-organising feature maps; unsupervised learning; ART1 architecture; IC yield loss; adaptive resonance theory network 1; defect spatial pattern; equipment problems; failure cause diagnosis; identification; neural-network approach; neural-network architecture; process variations; self-organizing map; semiconductor fabrication; semiconductor manufacturing company; unsupervised neural network; wafer defects; Fabrication; Manufacturing industries; Manufacturing processes; Pattern recognition; Predictive models; Semiconductor device manufacture; Semiconductor device modeling; Statistical analysis; Statistical distributions; Statistics;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
