DocumentCode
1368940
Title
A control method to reduce the standard deviation of flow time in wafer fabrication
Author
Yoon, Hyun Joong ; Lee, Doo Yong
Author_Institution
Dept. of Mech. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
Volume
13
Issue
3
fYear
2000
fDate
8/1/2000 12:00:00 AM
Firstpage
389
Lastpage
392
Abstract
This paper proposes a control, method for reducing flow time variability in a wafer fabrication facility with multiple wafer types. We employ stochastic Petri nets to model and analyze the machine module, and define operation due dates using a novel utilization index metric. An operation due date (OPNDD) rule for lot dispatch is proposed and evaluated against other lot dispatch policies
Keywords
Petri nets; dispatching; integrated circuit manufacture; production control; control method; flow time; lot dispatch; multiple wafer types; operation due dates; standard deviation; stochastic Petri nets; utilization index metric; wafer fabrication facility; Dielectrics; Etching; Fabrication; Flash memory; Plasma applications; Plasma devices; Plasma measurements; Solid state circuits; Stress; Threshold voltage;
fLanguage
English
Journal_Title
Semiconductor Manufacturing, IEEE Transactions on
Publisher
ieee
ISSN
0894-6507
Type
jour
DOI
10.1109/66.857950
Filename
857950
Link To Document