Threshold Voltage Adjustment in Nanoscale DG FinFETs Via Limited Source/Drain Dopants in the Channel

Author

Chouksey, Siddharth ; Fossum, Jerry G. ; Behnam, Ashkan ; Agrawal, Shishir ; Mathew, Leo

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Florida, Gainesville, FL, USA

Volume

56

Issue

10

fYear

2009

Firstpage

2348

Lastpage

2353

Abstract

Nanoscale double-gate (DG) FinFETs with undoped fin bodies are shown to have threshold voltages (Vt) that can be adjusted for independent I _ON and I _OFF control by allowing limited source/drain (S/D) dopants in the channel. S/D engineering of the lateral doping profile in the extension is proposed as a viable means for effecting such channel doping [as well as gate-S/D (G-S/D) underlap] and, thus, adjusting Vt for optimal I _ON/I _OFF in low-power and high-performance applications of nanoscale-FinFET CMOS. Physics-based device simulations, numerical simulations, and measured current-voltage characteristics are used to demonstrate and support the proposed Vt design approach.

Keywords

CMOS integrated circuits; MOSFET; doping profiles; semiconductor doping; channel doping; complementary metal-oxide-semiconductor; field effect transistors; lateral doping profile; limited source/drain dopant; measured current-voltage characteristics; nanoscale FinFET CMOS; nanoscale double gate FinFET; numerical simulation; physics based device simulation; threshold voltage adjustment; CMOS technology; Current measurement; Doping profiles; FinFETs; Fluctuations; MOS devices; Numerical simulation; Reliability engineering; Threshold voltage; Voltage control; $I_{rm ON}$ versus $I_{rm OFF}$; Effective channel length; gate–source/drain (G–S/D) underlap; random doping fluctuations (RDFs); source/drain (S/D) lateral doping profile;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2009.2028403

Filename

5238592