• DocumentCode
    1369522
  • Title

    Enhanced Drain Current of 4H-SiC MOSFETs by Adopting a Three-Dimensional Gate Structure

  • Author

    Nanen, Yuichiro ; Yoshioka, Hironori ; Noborio, Masato ; Suda, Jun ; Kimoto, Tsunenobu

  • Author_Institution
    Dept. of Electron. Sci. & Eng., Kyoto Univ., Kyoto, Japan
  • Volume
    56
  • Issue
    11
  • fYear
    2009
  • Firstpage
    2632
  • Lastpage
    2637
  • Abstract
    4H-SiC (0001) metal-oxide-semiconductor field-effect transistors (MOSFETs) with a 3-D gate structure, which has a top channel on the (0001) face and side-wall channels on the {112macr0} face, have been fabricated. The 3-D gate structures with a 1-5-mum width and a 0.8- mum height have been formed by reactive ion etching, and the gate oxide has been deposited by plasma-enhanced chemical vapor deposition and then annealed in N2O ambient at 1300degC. The fabricated MOSFETs have exhibited good characteristics: The I ON/I OFF ratio, the subthreshold swing, and V TH are 109, 210 mV/decade, and 3.5 V, respectively. The drain current normalized by the gate width is increasing with decreasing the gate width. The normalized drain current of a 1-mum-wide MOSFET is 16 times higher than that of a conventional planar MOSFET.
  • Keywords
    MOSFET; plasma CVD; sputter etching; 3D gate structure; MOSFET; drain current; gate oxide; metal-oxide-semiconductor field-effect transistors; plasma-enhanced chemical vapor deposition; reactive ion etching; three-dimensional gate structure; Chemical vapor deposition; Etching; FETs; MOS devices; MOSFETs; Oxidation; Plasma applications; Plasma chemistry; Plasma properties; Silicon carbide; 3-D gate structure; Metal–oxide–semiconductor field-effect transistor (MOSFET); multigate FET (MuGFET); silicon carbide (SiC);
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2009.2030437
  • Filename
    5238625