Title :
A synthesis approach to design optimally fault tolerant network architecture
Author :
Sengupta, A. ; Joshi, P.D. ; Bandyopadhyay, S.
Author_Institution :
Dept. of Comput. Sci., South Carolina Univ., Columbia, SC, USA
fDate :
1/1/1991 12:00:00 AM
Abstract :
A synthesis approach to the design of a class of regular networks which provide optimal fault tolerance and are of small diameter is presented. The approach makes it possible to design a regular network in the form of a directed graph when the number of nodes n and the number of connections per node d are given, for any n and d. The designed graph will have node connectivity d and a diameter proportional to [ogd n]
Keywords :
computer networks; directed graphs; fault tolerant computing; design; directed graph; node connectivity; optimally fault tolerant network architecture; regular networks; synthesis approach; Computer networks; Delay; Fault tolerance; LAN interconnection; Multiprocessing systems; Multiprocessor interconnection networks; Network synthesis; Network topology; Optical fiber LAN; Routing;
Journal_Title :
Computers, IEEE Transactions on
