Self-multiplexing force-sense test structures for (MOS) IC applications

A self-multiplexing technique that enables multiple force-sense measurements to be carried out on test structures in the small area scribe lanes of product chips is presented. Instead of using separate address signals, the technique uses the distribution of stimulus and sense voltages across lines to select the proper test structure, leading to a drastic reduction in the number of probe pads. A simple, robust prototype circuit which enables four independent test structures to be measured with only five probe pads is presented. The technique can be extended to 12 structures with some additional circuitry. Excellent measurement accuracy is obtained and the self-multiplexing circuit allows a wide range of operating conditions while being insensitive to process variations