DocumentCode :
1370240
Title :
Correction to ´The De Bruijn multiprocessor network: a versatile parallel processing and sorting network for VLSI´
Author :
Samatham, M.R. ; Pradhan, D.K.
Volume :
40
Issue :
1
fYear :
1991
Firstpage :
122
Abstract :
Corrections to the galley proof of the above-titled paper by the authors (see ibid., vol.38, no.4, p.567-81 (1989)) that were inadvertently omitted from the published paper are given.<>
Keywords :
VLSI; multiprocessor interconnection networks; sorting; De Bruijn multiprocessor network; VLSI; sorting network; versatile parallel processing; Computer architecture; Delta modulation; Fault tolerance; NASA; Network topology; Parallel processing; Processor scheduling; Sorting; Very large scale integration;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.67330
Filename :
67330
Link To Document :
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