Title :
Yield and matching implications for static RAM memory array sense-amplifier design
Author :
Lovett, Simon J. ; Gibbs, Gary A. ; Pancholy, Ashish
Author_Institution :
Cypress Semicond., San Jose, CA, USA
Abstract :
The effects of MOS transistor mismatch upon sense-amplifier yield in synchronous static RAM memories is investigated. The matching characteristics of the two transistor layout styles are compared, a general formula is derived for calculating the statistical likelihood of the sense amplifier failing to read correct data given transistor size and input differential voltage, recommendations are made for optimizing size/speed/reliability trade-offs.
Keywords :
MOS memory circuits; SRAM chips; cellular arrays; impedance matching; integrated circuit design; integrated circuit reliability; MOS transistor mismatch; amplifier yield; input differential voltage; matching characteristics; reliability; sense-amplifier design; size; speed; static RAM memory array; statistical likelihood; synchronous static RAM memories; transistor layout styles; transistor size; Capacitance; Circuits; Differential amplifiers; Frequency; Impedance matching; MOSFETs; Random access memory; Read-write memory; Subthreshold current; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
