Title :
Systolic array implementation of block LMS algorithm
Author :
Yoshida, T. ; Liguni, Y. ; Maeda, H.
Author_Institution :
Dept. of Commun. Eng., Osaka Univ., Japan
fDate :
4/2/1998 12:00:00 AM
Abstract :
The authors derive the systolic array implementation of the block LMS algorithm, consisting of N processing elements, where N is the filter order. The resulting array attains an order-independent sampling rate. Computer simulation results show that the block LMS algorithm is faster than the delayed LMS algorithm, which has previously been implemented on systolic arrays
Keywords :
least mean squares methods; systolic arrays; block LMS algorithm; computer simulation; sampling rate; systolic array;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19980493
