• DocumentCode
    1371280
  • Title

    FPGA implementation for 2D discrete wavelet transform

  • Author

    Hung, King-Chu ; Huang, Yu-Jung ; Truong, Trieu-Kien ; Wang, Chia-Ming

  • Author_Institution
    Dept. of Electron. Eng., I-Shou Univ., Taiwan, China
  • Volume
    34
  • Issue
    7
  • fYear
    1998
  • fDate
    4/2/1998 12:00:00 AM
  • Firstpage
    639
  • Lastpage
    640
  • Abstract
    An operator correlation-based algorithm and its VLSI architecture For computing the 2D discrete wavelet transform is presented. The proposed discrete wavelet transform architecture was simulated in Verilog and synthesised with the FPGA compiler. The implementation for the 2D discrete wavelet transform on an FPGA-based design style is described
  • Keywords
    VLSI; field programmable gate arrays; wavelet transforms; 2D discrete wavelet transform; FPGA; VLSI architecture; Verilog simulation; operator correlation algorithm;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19980536
  • Filename
    673767
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1371280