Synthesis of interfaces and communication in reconfigurable embedded systems

Reconfigurable devices are used in different ways for the design of embedded systems. As reconfigurable computing is a rather new field, there is still a lack of design methodologies and tools. Previous work on design automation for reconfigurable systems focused on partitioning and scheduling. The authors present an approach to communication synthesis in reconfigurable embedded systems. Using the proposed methodology, the designer can focus on the functional behavior of the design and on the evaluation of different mappings. All the low-level details of the reconfigurable resource are hidden. In the paper, the authors first classify communication types in reconfigurable systems, covering both compile-time and run-time reconfiguration. Then they describe their tool suite CORES-HASIS that generates interface circuitry to connect communicating tasks in reconfigurable systems. The tasks may be mapped onto the same or onto different FPGAs. The tools multiplex several logical communication channels over one physical channel-insert routing nodes to connect tasks on nonadjacent devices, and provide dedicated interfaces that solve the problem of interconfiguration communication. A case study demonstrates the usability and efficiency of the approach