Multi-level optimisation approach to switched capacitor filter synthesis

A multi-level optimisation approach to switched capacitor filter synthesis in which the top-down synthesis flow consists of high level and circuit level optimisers is presented. At high level, generalised macromodels of switched capacitor filter circuits are optimised to meet the given filter specifications. Parameters optimised at high level are treated as specifications for a circuit level optimiser, which is based on a novel algorithm that combines evolution strategies (ES) with simulated annealing. The optimisation strategy combines the advantages of SPICE-type simulations, neural performance models and knowledge-based approach in satisfying the constraints and specifications. The algorithmic details of the synthesis system are discussed in detail, and illustrative examples that demonstrate the validity of the approach are presented