Current-mode group-delay equalisation using pole-zero mirroring technique

The authors describe an efficient method for designing current-mode group-delay equalisers. The method is based on introducing zeros into the right-hand s-plane by mirroring the poles of an LC ladder network. This is achieved by developing a current-mode model capable of implementing the pole-zero mirroring technique. Using multiple-output OTAs and grounded capacitors, the model is used to derive an nth-order active group-delay equaliser structure which is simpler, has better correction accuracy and is less sensitive when compared to cascade approach based equalisers. The equaliser design involves two optimisation algorithms. The first algorithm generates a polynomial function whose group-delay response equalises the filter response. The second algorithm produces the equaliser component values as a result of solving a set of nonlinear equations generated from coefficient matching the equaliser transfer function to the polynomial generated from the first algorithm. Simulated results with CMOS OTAs and measured results based on discrete realisation of a 6th-order equaliser are included. The results demonstrate that the equaliser can effectively compensate the delay characteristics of a 7th-order 5.75 MHz lowpass elliptic video filter to <5 ns ripple over 90% of the filter passband