DocumentCode :
1372259
Title :
Design of a high speed processor system bus for notebook computers
Author :
Hsu, Pochang ; Tian, Yanmei ; Pasdast, Gerald
Author_Institution :
Mobile Comput. Group, Intel Corp., Santa Clara, CA, USA
Volume :
23
Issue :
3
fYear :
2000
fDate :
8/1/2000 12:00:00 AM
Firstpage :
521
Lastpage :
529
Abstract :
A 133 MHz processor system bus (PSB) has been designed and developed for notebook computer systems running at core frequency of 500 MHz and beyond based on an enhanced gunning transceiver logic. We described the design flow and highlighted the design challenges unique to notebook computers, It is shown that with careful I/O circuit design, transmission line analysis and reliability consideration, the design target can be achieved. A similar approach can be applied to notebook computers with even higher bus frequency
Keywords :
notebook computers; system buses; 133 MHz; I/O circuit design; PSB; bus frequency; core frequency; design challenges; design flow; enhanced gunning transceiver logic; high speed processor system bus; notebook computers; reliability consideration; transmission line analysis; CMOS technology; Central Processing Unit; Circuit synthesis; Distributed parameter circuits; Frequency; Logic design; Microcomputers; System buses; Transceivers; Voltage;
fLanguage :
English
Journal_Title :
Advanced Packaging, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-3323
Type :
jour
DOI :
10.1109/6040.861569
Filename :
861569
Link To Document :
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