Noise associated with interdigitated gate structures in RF submicron MOSFETs

Author

Tsakas, Evangelos F. ; Birbas, Alexios N.

Author_Institution

Dept. of Electr. & Comput. Eng., Patras Univ., Greece

Volume

47

Issue

9

fYear

2000

fDate

9/1/2000 12:00:00 AM

Firstpage

1745

Lastpage

1750

Abstract

CMOS technologies have gained considerable attention and have raised expectations for employment in RF transceivers. The shrinkage of the MOSFET device dimensions along with the relatively wide gate electrode devices needed to accommodate RF applications lead to reconsideration of the noise properties of submicron MOSFETs. In this paper, we present the noise properties associated with interconnect resistors of an interdigitated structure and the resulting noise source (strong function of the number of fingers) is evaluated against the other noise sources present in the device such as channel thermal noise, induced gate noise, and resistive gate voltage noise. Short channel effects have been taken into account for the evaluation of these noise sources and two-port analysis performed in order to calculate minimum noise figure and optimum input resistance for noise matching

Keywords

MOSFET; semiconductor device noise; CMOS transceiver; interconnect resistor; interdigitated gate electrode; noise model; short channel effect; submicron RF MOSFET; two-port analysis; CMOS technology; Electrodes; Employment; Fingers; MOSFET circuits; Noise figure; Radio frequency; Resistors; Thermal resistance; Transceivers;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.861586

Filename

861586