Author :
Sung, Guo-Ming ; Yu, Chih-Ping ; Hung, Tsai-Wang ; Hsieh, Hsiang-Yuan
Author_Institution :
Dept. of Electr. Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan
Abstract :
This study presents a mixed-mode chip for use in a vector-controlled induction motor drive. It exhibits digital scalar space vector pulse width modulation (DSSVPWM), and comprises a proportional-integral (PI) controller, a simplified central processing unit (CPU), and a second-order delta-sigma analog-to-digital converter (Δ-Σ ADC). It is fabricated using a standard 0.35-μm 2P4M CMOS process. All of the circuits, digital and analog, are realized in a single chip as a convenient, high-speed, highly integrated, and low-cost solution. The digital circuit contains a DSSVPWM, a simplified CPU, a PI controller, and a decimator filter; the analog circuit is a second-order switched-current (SI) delta-sigma modulator, which includes two discrete-time integrators, a current comparator, a current-mode digital-to-analog converter, a D-type flip-flop, a nonoverlapping clock generator, and a bias current generator. This mixed-mode chip constitutes a closed-loop motor drive system with stable performance, short response times, precise controllability, and flexibility. Experimental results indicate that the digital circuit has a power consumption of 17.95 mW and a maximum frequency of 100 MHz, and that the SNR and power dissipation of the analog circuit are 71.9 dB and 12.1 mW, respectively, with a bandwidth of 10 kHz, an over sampling ratio of 128, and a sampling rate of 2.56 MHz at a power supply of 3.3 V.
Keywords :
CMOS integrated circuits; PI control; current comparators; delta-sigma modulation; flip-flops; induction motor drives; mixed analogue-digital integrated circuits; switched current circuits; CMOS process; D-type flip-flop; DSSVPWM; bandwidth 10 kHz; bias current generator; current comparator; current-mode digital-to-analog converter; decimator filter; digital scalar space vector pulse width modulation; discrete-time integrators; frequency 100 MHz; mixed-mode chip implementation; nonoverlapping clock generator; power 12.1 mW; power 17.95 mW; proportional-integral controller; simplified-CPU; size 0.35 mum; switched-current delta-sigma ADC; vector-controlled induction motor drive; voltage 3.3 V; word length 12 bit; Central Processing Unit; Control systems; Decision support systems; Digital circuits; Modulation; Motor drives; Registers; Analog-to-digital converter; delta-sigma modulator; motor drive; proportional-integral controller; space vector pulse width modulation; switched-current (SI);