DocumentCode :
1372738
Title :
Fast conversion algorithm for very large Boolean functions
Author :
Wang, L. ; Almani, A.E.A.
Author_Institution :
Sch. of Eng., Napier Univ., UK
Volume :
36
Issue :
16
fYear :
2000
fDate :
8/3/2000 12:00:00 AM
Firstpage :
1370
Lastpage :
1371
Abstract :
Fixed polarity Reed-Muller (FPRM) expressions are alternatives to the traditional sum-of-products forms (SOPs) for the representation of Boolean functions. A fast algorithm is proposed to convert from SOPs to FPRM forms without generating disjoint cube covers or functional decision diagrams (FDDs). This procedure is based on the property of input redundancy and is tailored for very large multiple output Boolean functions. Test results for benchmark examples of up to 199 inputs and 99 outputs are given
Keywords :
Boolean functions; Reed-Muller codes; multivalued logic circuits; programmable logic arrays; redundancy; fixed polarity Reed-Muller expressions; input redundancy; multiple output Boolean functions; very large Boolean functions;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:20001009
Filename :
862149
Link To Document :
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