• DocumentCode
    137308
  • Title

    A neural recorder IC with HV input multiplexer for voltage and current stimulation with 18V compliance

  • Author

    Bihr, Ulrich ; Anders, Jens ; Rickert, J. ; Schuettler, Martin ; Moeller, A. ; Boven, K.H. ; Becker, Jurgen ; Ortmanns, Maurits

  • Author_Institution
    Inst. of Microelectron., Univ. of Ulm, Ulm, Germany
  • fYear
    2014
  • fDate
    22-26 Sept. 2014
  • Firstpage
    103
  • Lastpage
    106
  • Abstract
    This paper presents an innovative ASIC design used in a high voltage (HV) neuromodulation system-in-package (SiP). A HV input switching network offers synchronous neural recording at 32 electrodes and independent stimulation on two selectable electrodes with up to 15mA and 18V input compliance. In addition, it provides artifact canceling and enables the use of different supply voltages for stimulator and recorder. Thus, a HV stimulator can be combined with a high efficient LV neural recorder design. Frequency separation of the local field potentials (LFP) and action potentials (AP) with individually adjustable gain and frequency settings via switched capacitor filter structures implicitly improves the input referred quantization error. The LFP low corner frequency can be measured reproducibly at 60mHz and the measured input referred noise is 3.3 μVrms for both, the AP and LFP band. The design is implemented in a 180nm HV CMOS technology, has a die size of 3.8mm × 4.3mm and a power consumption of 4.5mW.
  • Keywords
    CMOS integrated circuits; application specific integrated circuits; integrated circuit design; multiplexing equipment; neural chips; prosthetics; recording; system-in-package; AP; HV CMOS technology; HV SiP; HV input multiplexer; HV input switching network; LFP low corner frequency; action potentials; current stimulation; electrodes; frequency 60 mHz; frequency separation; high efficient LV neural recorder design; high voltage neuromodulation system-in-package; implantable neuromodulation devices; innovative ASIC design; input referred quantization error; local field potentials; neural recorder IC; size 180 nm; switched capacitor filter structures; synchronous neural recording; voltage 18 V; voltage 3.3 muV; voltage stimulation; Application specific integrated circuits; Electrodes; Frequency division multiplexing; Gain; Noise; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th
  • Conference_Location
    Venice Lido
  • ISSN
    1930-8833
  • Print_ISBN
    978-1-4799-5694-4
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.2014.6942032
  • Filename
    6942032