DocumentCode :
1373296
Title :
Twin-T compensation using root locus methods
Author :
Slaughter, J. B. ; Rosenstein, A. B.
Author_Institution :
United States Navy Electronics Laboratory, San Diego, Calif.
Volume :
81
Issue :
6
fYear :
1963
Firstpage :
339
Lastpage :
350
Abstract :
Techniques are described for the rapid synthesis of twin-T RC (resistance capacitance) networks with specified singularities. The twin-T network can be used to generate a pair of complex zeros that lie at any specified points in the left-half portion of the s-plane and under certain conditions can be used to produce zeros in the right-half plane.
Keywords :
Equations; Impedance; Industries; Investments; Poles and zeros; Shape;
fLanguage :
English
Journal_Title :
American Institute of Electrical Engineers, Part II: Applications and Industry, Transactions of the
Publisher :
ieee
ISSN :
0097-2185
Type :
jour
DOI :
10.1109/TAI.1963.6371767
Filename :
6371767
Link To Document :
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