• DocumentCode
    1375258
  • Title

    Rotary pipeline processors

  • Author

    Moore, S. ; Robinson, P. ; Wilcox, S.

  • Author_Institution
    Comput. Lab., Cambridge Univ., UK
  • Volume
    143
  • Issue
    5
  • fYear
    1996
  • fDate
    9/1/1996 12:00:00 AM
  • Firstpage
    259
  • Lastpage
    265
  • Abstract
    The rotary pipeline processor is a new architecture for superscalar computing. It is based on a simple and regular pipeline structure which can support several ALUs for efficient dispatching of multiple instructions. Values flow around a rotary pipeline, constrained by local data dependencies. During normal operation the control circuits are not on the critical path and performance is only limited by data rates. The architecture is particularly well suited to implementation using self-timed logic
  • Keywords
    pipeline processing; timing circuits; ALUs; local data dependencies; multiple instructions; regular pipeline structure; rotary pipeline processors; self-timed logic; superscalar computing;
  • fLanguage
    English
  • Journal_Title
    Computers and Digital Techniques, IEE Proceedings -
  • Publisher
    iet
  • ISSN
    1350-2387
  • Type

    jour

  • DOI
    10.1049/ip-cdt:19960657
  • Filename
    537216