Finite element modelling of the thermal stress field during processing of VLSI multilevel structures

An advanced strategy is presented for modelling thermal stress induced in aluminium interconnections during processing. The advantage of the approach described is that it allows the residual stresses from one technological step to be used as an initial condition for subsequent steps. The particular example demonstrated here is for a passivated aluminium line (silicon-glass-aluminium-glass), however, the technique is readily extendible to more complex situations and material combinations