Nonvolatile memory operations of metal-ferroelectric-insulator-semiconductor (MFIS) FETs using PLZT/STO/Si(100) structures

Author

Tokumitsu, Eisuke ; Nakamura, Ryo-ichi ; Ishiwara, Hiroshi

Author_Institution

Precision & Intelligence Lab., Tokyo Inst. of Technol., Yokohama, Japan

Volume

18

Issue

4

fYear

1997

fDate

4/1/1997 12:00:00 AM

Firstpage

160

Lastpage

162

Abstract

We report fabrication and characterization of p-channel metal-ferroelectric-insulator-semiconductor (MFIS)-FETs using the PLZT/STO/Si(100) structures and demonstrate nonvolatile memory operations of the MFIS FETs. It is found that I/sub D/-V/sub G/ characteristics of PLZT/STO/Si MFIS-FET\´s show a hysteresis loop due to the ferroelectric nature of the PLZT film. It is also demonstrated that the I/sub D/ can be controlled by the "write" pulse, which was applied before the measurements, even at the same "read" gate voltage.

Keywords

MISFET; characteristics measurement; elemental semiconductors; ferroelectric storage; ferroelectric thin films; field effect memory circuits; hysteresis; integrated circuit measurement; lanthanum compounds; lead compounds; piezoceramics; random-access storage; silicon; strontium compounds; I/sub D/-V/sub G/ characteristics; MFIS FET; PLZT-SrTiO/sub 3/-Si; PbLaZrO3TiO3-SrTiO3-Si; ferroelectric thin films; hysteresis loop; metal-ferroelectric-insulator-semiconductor structures; nonvolatile memory operations; read gate voltage; write pulse; Buffer layers; Dielectric constant; FETs; Ferroelectric films; Ferroelectric materials; Insulation; Metal-insulator structures; Nonvolatile memory; Semiconductor films; Voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.563315

Filename

563315