Stacked Gated Twin-Bit (SGTB) SONOS Memory Device for High-Density Flash Memory

Author

Shim, Won Bo ; Cho, Seongjae ; Lee, Jung Hoon ; Li, Dong Hua ; Kim, Doo-Hyun ; Lee, Gil Sung ; Kim, Yoon ; Park, Se Hwan ; Kim, Wandong ; Choi, Jungdal ; Park, Byung-Gook

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea

Volume

11

Issue

2

fYear

2012

fDate

3/1/2012 12:00:00 AM

Firstpage

307

Lastpage

313

Abstract

A novel stacked gated twin-bit SONOS memory for high-density nonvolatile flash memory is introduced. We introduced gated twin-bit (GTB) memory previously that has a cut-off gate and two memory nodes at a single wordline. To increase the density of the GTB memory integration, we stacked poly-silicon gates in a vertical direction. In a 4F² size, we can integrate 2 N memory nodes, where N is the number of stacked gates. In this paper, its fabrication method is introduced and electrical characteristics are investigated thoroughly by device simulations.

Keywords

flash memories; nitrogen compounds; oxygen compounds; random-access storage; silicon; sulphur compounds; SONOS; device simulations; electrical characteristics; fabrication method; high-density nonvolatile flash memory; memory nodes; poly-silicon gates; stacked gated twin-bit memory device; Arrays; Flash memory; Logic gates; Nonvolatile memory; SONOS devices; Silicon; Tunneling; 3-D NAND flash memory; Cut-off gate; SONOS; stacked gated twin-bit (SGTB); vertical channel;

fLanguage

English

Journal_Title

Nanotechnology, IEEE Transactions on

Publisher

ieee

ISSN

1536-125X

Type

jour

DOI

10.1109/TNANO.2011.2172217

Filename

6081945