DocumentCode :
1378633
Title :
Novel large area joining technique for improved power device performance
Author :
Schwarzbauer, Herbert ; Kuhnert, Reinhold
Author_Institution :
Siemens AG, Munich, Germany
Volume :
27
Issue :
1
fYear :
1991
Firstpage :
93
Lastpage :
95
Abstract :
Conventional techniques of joining silicon wafers to suitable substrates do not satisfy the demands of future power devices. Therefore, a low-temperature joining technique based on the principle of diffusion welding has been developed. The surfaces to be joined have to be metalized with Ag or Au. The molybdenum substrate is coated with a thin layer of silver flakes. Thereafter, the parts to be joined are sintered together at about 240°C and a pressure of approximately 40 N/mm2 for a few minutes. The joining technique does not affect the silicon wafer, and accordingly, is compatible with conventional power device and IC fabrication techniques. Both sides of the wafer can be joined with substrates even if IC structures are present. This possibility allows an increased surge current. Numerical calculations for different wafer thicknesses have been performed and compared with test devices. The technical usefulness has been proved by additional tests such as thermal cycling
Keywords :
elemental semiconductors; joining processes; power electronics; power integrated circuits; semiconductor devices; semiconductor technology; silicon; 240 degC; Ag; Au; IC fabrication techniques; Mo; Si-Ag-Mo; diffusion welding; elemental semiconductors; large area joining technique; power device fabrication; power device performance; surge current; thermal cycling; wafer thicknesses; Alloying; Gold; Powders; Silicon; Silver; Substrates; Temperature; Testing; Thermal conductivity; Welding;
fLanguage :
English
Journal_Title :
Industry Applications, IEEE Transactions on
Publisher :
ieee
ISSN :
0093-9994
Type :
jour
DOI :
10.1109/28.67536
Filename :
67536
Link To Document :
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